23-28 June 2019
Collegium Maius
Europe/Warsaw timezone

FTAB - small form factor and versatile board for J-PET detector

27 Jun 2019, 10:25
20m
Collegium Maius

Collegium Maius

Jagiellońska 15 Street, Kraków
talk Thursday

Speaker

Marek Pałka

Description

A design of electronics for detector system frequently requires to incorporate a few different stages: signal amplification, sampling in voltage or time domain and finally producing a packet containing all required data. Normally each of this stage is incorporated into a single module. However nowadays, in attempt of miniaturization of existing systems, these stages are being meld. During this talk a Front-End, TDC and Acquisition Board (FTAB) will be presented. This compact board, which size is just 16x7 cm, is capable of measuring 102 fast analogue signals. It measures times when signals are crossing predefined thresholds, which are set individually for each channel. The average RMS of time measurements amounts to 30 ps. Digitized signals are then combined to form a packet, which is sent through 6Gb/s optical connection. The talk will focus on demonstrating the FTAB architecture, its versatile capabilities and resent results.

Primary author

Marek Pałka

Presentation Materials